CDCE421 状态: ACTIVE

产品信息

特性

• Single 3.3-V Supply
• High-Performance Clock Generator Incorporating Crystal-Oscillator Circuitry With Integrated Frequency Synthesizer
• Low-Output Jitter, as Low as 380 fs (rms Integrated Between 10 kHz–20 MHz)
• Low Phase Noise at High Frequency; at 708 MHz It Is Less Than –109 dBc/Hz at 10-kHz and –146 dBc/Hz at 10-MHz Offset From the Carrier
• Supports Crystal Frequencies Between 27.35 MHz to 38.33 MHz
• Output Frequency Ranges From 10.9 MHz up to 766.7 MHz and From 875.2 MHz up to 1175 MHz
• Low-Voltage Differential Signaling (LVDS) Output, 100- Differential Off-Chip Termination, 10.9-MHz to 400-MHz Frequency Range
• Differential Low-Voltage Positive Emitter-Coupled Logic (LVPECL) Output, 10.9-MHz to 1.175-GHz Frequency Range
• Two Fully Integrated Voltage-Controlled Oscillators (VCOs) Support Wide Output Frequency Range
• Fully Integrated Programmable Loop Filter
• Typical Power Consumption 240 mW in LVDS Mode and 300 mW in LVPECL Mode
• Chip-Enable Control Pin
• Simple Serial Interface Allows Programming After Manufacturing
• Integrated On-Chip Non-Volatile Memory (EEPROM) to Store Settings Without the Need to Apply High Voltage to the Device
• Die or QFN24 Package
• ESD Protection Exceeds 2 kV HBM
• Industrial Temperature Range –40°C to 85°C
• APPLICATIONS
  • Low-Cost, High-Frequency Crystal Oscillator

说明

The CDCE421 is a high-performance, low-phase-noise clock generator. It has two fully integrated, low-noise, LC-based voltage controlled oscillators (VCOs) that operate in the 1.750-GHz–2.350-GHz frequency range. It has an integrated crystal oscillator that operates in conjunction with an external AT-cut crystal to produce a stable frequency reference for the PLL-based frequency synthesizer.

The output frequency (f_out) is proportional to the frequency of the input crystal (f_xtal). The prescaler divider, feedback divider, output divider, and VCO selection are what set (f_out) with respect to (f_xtal). For a desired frequency (f_out), look in and find the corresponding settings in the same row. Use to calculate the exact crystal oscillator frequency needed for the desired output.

f_xtal = (OutputDivider FeedbackDivider) × f_out

Output divider⁽¹⁾ = 1, 2, 4, 8, 16, or 32

Feedback divider⁽²⁾ = 12, 16, 20, or 32
⁽¹⁾Output divider and feedback divider should be from the same row in Table 1.
⁽²⁾Feedback divider is set automatically with respect to the prescaler setting in Table 1.

A high-level block diagram of the CDCE421 is shown in Figure 1.

The CDCE421 supports one differential LVDS clock output or one differential LVPECL output.

All device settings are programmable through a Texas Instruments proprietary simple serial interface.

The device operates in a 3.3-V supply environment and is characterized for operation from –40°C to 85°C.

The CDCE421 is available in die form or in a QFN-24 package.

In the CDCE421, the feedback divider is set automatically with respect to the prescaler setting. The product of the prescaler and the feedback divider will be either 60 or 64, as shown in , to keep the control loop stable.