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CDCE72010 状态: ACTIVE

10 路输出低抖动时钟同步器和抖动消除器

      
         
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另请参阅

  • CDCM7005 - 器件与被比较器件具有相似功能，但并不功能等效。  CDCM7005 supports 5 outputs and less output divider

数据表

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功能方框图


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 CDCE72010
VCC(V)3.3  
Input LevelLVPECL,LVCMOS  
Output LevelLVPECL,LVDS,LVCMOS  
Output Frequency(Min)(Mhz)0.001  
Output Frequency(Max)(Mhz)1500  
Divider Ratio1 - 80  
Pin/Package64VQFN  
Operating Temp Range(Celsius)-40 to 85  
 样片
 库存

产品信息

特性

  • High Performance LVPECL, LVDS, LVCMOS PLL Clock Synchronizer
  • Two Reference Clock Inputs (Primary and Secondary Clock) for Redundancy Support with Manual or Automatic Selection
  • Accepts Two Differential Input (LVPECL or LVDS) References up to 500MHz (or Two LVCMOS Inputs up to 250MHz) as PLL Reference
  • VCXO_IN Clock is Synchronized to One of Two Reference Clocks
  • VCXO_IN Frequencies up to 1.5GHz (LVPECL)
    800Mhz for LVDS and 250MHz for LVCMOS Level Signaling
  • Outputs Can be a Combination of LVPECL, LVDS, and LVCMOS (Up to 10 Differential LVPECL or LVDS Outputs or up to 20 LVCMOS Outputs), Output 9 can be Converted to an Auxiliary Input as a 2nd VC(X)O.
  • Output Divider is Selectable to Divide by 1, 2, 3, 4, 5, 6, 8, 10, 12, 16, 18, 20, 24, 28, 30, 32, 36, 40, 42, 48, 50, 56, 60, 64, 70, or 80 On Each Output Individually up to Eight Dividers. (Except for Output 0 and 9, Output 0 Follows Output 1 Divider and Output 9 Follows Output 8 Divider)
  • SPI Controllable Device Setting
  • Individual Output Enable Control via SPI Interface
  • Integrated On-Chip Non-Volatile Memory (EEPROM) to Store Settings without the Need to Apply High Voltage to the Device
  • Optional Configuration Pins to Select Between Two Default Settings Stored in EEPROM
  • Efficient Jitter Cleaning from Low PLL Loop Bandwidth
  • Very Low Phase Noise PLL Core
  • Programmable Phase Offset (Input Reference to Outputs)
  • Wide Charge-Pump Current Range From 200µA to 3mA
  • Dedicated Charge-Pump Supply for Wide Tuning Voltage Range VCOs
  • Presets Charge-Pump to VCC_CP/2 for Fast Center-Frequency Setting of VC(X)O, Controlled Via the SPI Bus
  • SERDES Startup Mode (Depending on VCXO Range)
  • Auxiliary Input: Output 9 can Serve as 2nd VCXO Input to Drive All Outputs or to Serve as PLL Feedback Signal
  • RESET or HOLD Input Pin to Serve as Reset or Hold Functions
  • REFERENCE SELECT for Manual Select Between Primary and Secondary Reference Clocks
  • POWER DOWN (PD) to Put Device in Standby Mode
  • Analog and Digital PLL Lock Indicator
  • Internally Generated VBB Bias Voltages for Single-Ended Input Signals
  • Frequency Hold-Over Mode Activated by HOLD Pin or SPI Bus to Improve Fail-Safe Operation
  • Input to All Outputs Skew Control
  • Individual Skew Control for Each Output with Each Output Divider
  • Packaged in a QFN-64 Package
  • ESD Protection Exceeds 2kV HBM
  • Industrial Temperature Range of -40°C to 85°
  • APPLICATIONS
    • Low Jitter Clock Driver for High-End Telecom and Wireless Applications
    • High Precision Test Equipment

说明

The CDCE72010 is a high-performance, low phase noise, and low skew clock synchronizer that synchronizes a VCXO (Voltage Controlled Crystal Oscillator) or VCO (Voltage Controlled Oscillator) frequency to one of two reference clocks. The clock path is fully programmable providing the user with a high degree of flexibility. The following relationship applies to the dividers:

Frequency (VCXO_IN or AUX_IN) / Frequency (PRI_REF or SEC_REF) = (R*M) / (P*N)

The VC(X)O_IN clock operates up to 1.5GHz through the selection of external VC(X)O and loop filter components. The PLL loop bandwidth and damping factor can be adjusted to meet different system requirements.

The CDCE72010 can lock to one of two reference clock inputs (PRI_REF and SEC_REF) and supports frequency hold-over mode for fail-safe and system redundancy. The outputs of the CDCE72010 are user definable and can be any combination of up to 10 LVPECL/LVDS outputs or up to 20 LVCMOS outputs. The built-in synchronization latches ensure that all outputs are synchronized for very low output skew.

All device settings, including output signaling, divider value selection, input selection, and many more, are programmable with the SPI (4-wire Serial Peripheral Interface). The SPI allows individual control of the device settings.

The device operates in a 3.3V environment and is characterized for operation from -40°C to +85°C.

    

定价/封装/CAD 设计工具/样片

价格（美元）封装样片
器件状态温度 (oC)价格（美元） | Quantity封装 | 引脚顶端标记封装数量 | 封装载体样片
CDCE72010RGCRACTIVE-40 to 8513.70 | 100uVQFN (RGC) | 64 查看 2000 | LARGE T&R采购样片
CDCE72010RGCRG4ACTIVE-40 to 8513.70 | 100uVQFN (RGC) | 64 查看 2000 | LARGE T&R采购样片
CDCE72010RGCTACTIVE-40 to 8515.10 | 100uVQFN (RGC) | 64 查看 250 | SMALL T&R请与TI分销商或销售办事处联系申请样片
CDCE72010RGCTG4ACTIVE-40 to 8515.10 | 100uVQFN (RGC) | 64 查看 250 | SMALL T&R请与TI分销商或销售办事处联系申请样片

建议零售价格仅用于预算，以美元为单位，并且价格是浮动的。 若要查询有关批量价格、本地货币价格或交付报价的信息，请与当地德州仪器 (TI) 销售办事处或授权经销商联系。

库存

  TI 库存状态 已报告的分销商库存
CDCE72010RGCR截至 6:42 PM GMT, 2009年 7月 3日截至 6:42 PM GMT, 2009年 7月 3日
 交货周期地区公司库存采购
 14 Weeks无报告
查看经销商		   
CDCE72010RGCRG4截至 6:42 PM GMT, 2009年 7月 3日截至 6:42 PM GMT, 2009年 7月 3日
 交货周期地区公司库存采购
 14 Weeks无报告
查看经销商		   
CDCE72010RGCT截至 6:42 PM GMT, 2009年 7月 3日截至 6:42 PM GMT, 2009年 7月 3日
 交货周期地区公司库存采购
 14 Weeks无报告
查看经销商		   
CDCE72010RGCTG4截至 6:42 PM GMT, 2009年 7月 3日截至 6:42 PM GMT, 2009年 7月 3日
 交货周期地区公司库存采购
 14 Weeks无报告
查看经销商		   

查看中国经销商

**目前尚无法提供交货时间信息。 但是，由于我们的信息每天都会更新，如有疑问，请马上与我们联系。 有关附加信息，请与首选的 TI 授权分销商 联系。

质量与无铅数据

 产品目录DPPM / MTBF / FIT 率
器件环保计划* 铅/焊球涂层MSL 等级/回流焊峰详细信息详细信息
CDCE72010RGCR 符合 RoHS Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR查看查看
CDCE72010RGCRG4 符合 RoHS Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR查看查看
CDCE72010RGCT 符合 RoHS Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR查看查看
CDCE72010RGCTG4 符合 RoHS Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR查看查看

* 计划的环保分级：无铅 (RoHS)、无铅（RoHS 豁免）或绿色环保（RoHS 和无 Sb/Br）- 请单击上表中产品目录明细的“查看”链接，以获得最新供货信息和附加产品目录明细。

如果此时没有在线提供您所请求的信息，则请联系 我们的产品信息中心， 以了解关于此信息可用性的信息。

技术文档

CDCE72010 最新技术文档 Help

数据表

应用手册

用户指南

模型

更多文献资料

工具与软件

名称型号 公司 工具/软件类型
ADS5481 评估模块ADS5481EVMTexas Instruments开发电路板/EVM
ADS5482 评估模块ADS5482EVMTexas Instruments开发电路板/EVM
ADS5483 评估模块ADS5483EVMTexas Instruments开发电路板/EVM
ADS5484 评估模块ADS5484EVMTexas Instruments开发电路板/EVM
ADS5485 评估模块ADS5485EVMTexas Instruments开发电路板/EVM
ADS62C17 评估模块ADS62C17EVMTexas Instruments开发电路板/EVM
ADS62P28 评估模块ADS62P28EVMTexas Instruments开发电路板/EVM
ADS62P29 评估模块ADS62P29EVMTexas Instruments开发电路板/EVM
ADS62P48 评估模块ADS62P48EVMTexas Instruments开发电路板/EVM
ADS62P49 评估模块ADS62P49EVMTexas Instruments开发电路板/EVM
CDCE72010EVM 评估模块CDCE72010EVMTexas Instruments开发电路板/EVM
DAC5688 评估模块DAC5688EVMTexas Instruments开发电路板/EVM

型号 名称 产品系列 注释
CDCM7005   高性能、低相位噪声、低偏移的时钟同步器（使参考时钟与 VCXO 同步）     器件与被比较器件具有相似功能，但并不功能等效。  CDCM7005 supports 5 outputs and less output divider  
ADS5483   16-bit 130MSPS ADC with buffered inputs   DATA CONVERTERS - ANALOG TO DIGITAL CONVERTERS      
DAC5682Z   16 位 1.0 GSPS 2x-4x 内插双通道数模转换器 (DAC)   DATA CONVERTERS - DIGITAL TO ANALOG CONVERTERS      
SN65LVCP404   LVDS 4x4 交叉点交换器   LVDS/M-LVDS/ECL/CML - CROSSPOINT-SWITCH (>1GBPS)      
TMS320C6452   TMS320C6452 数字信号处理器   TMS320C6000 DSP PLATFORM - TMS320C645x DSPs      
ADS5481   具有缓冲模拟输入的 16 位 80MSPS ADC   DATA CONVERTERS - ANALOG TO DIGITAL CONVERTERS      
DAC5681   16 位 1.0GSPS 数模转换器 (DAC)   DATA CONVERTERS - DIGITAL TO ANALOG CONVERTERS      
SN65MLVD080   8 通道半双工 M-LVDS 收发器   LVDS/M-LVDS/ECL/CML - M-LVDS PHYS (<500MBPS)      
TMS320C6455   定点数字信号处理器   TMS320C6000 DSP PLATFORM - TMS320C645x DSPs      
ADS5282   8-Channel, 12-bit, 65MSPS Analog-to-Digital Converter   DATA CONVERTERS - ANALOG TO DIGITAL CONVERTERS      
DAC5652   双路 10 位 275 MSPS 数模转换器   DATA CONVERTERS - DIGITAL TO ANALOG CONVERTERS      

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