CDCE913 状态: ACTIVE

产品信息

特性

• Member of Programmable Clock Generator Family
  • CDCE913/CDCEL913: 1-PLL, 3 Outputs
  • CDCE925/CDCEL925: 2-PLL, 5 Outputs
  • CDCE937/CDCEL937: 3-PLL, 7 Outputs
  • CDCE949/CDCEL949: 4-PLL, 9 Outputs
• In-System Programmability and EEPROM
  • Serial Programmable Volatile Register
  • Nonvolatile EEPROM to Store Customer Setting
• Flexible Input Clocking Concept
  • External Crystal: 8 MHz to 32 MHz
  • On-Chip VCXO: Pull Range ±150 ppm
  • Single-Ended LVCMOS up to 160 MHz
• Free Selectable Output Frequency up to 230 MHz
• Low-Noise PLL Core
  • PLL Loop Filter Components Integrated
  • Low Period Jitter (Typical 50 ps)
• Separate Output Supply Pins
  • CDCE913: 3.3 V and 2.5 V
  • CDCEL913: 1.8 V
• Flexible Clock Driver
  • Three User-Definable Control Inputs [S0/S1/S2], for example., SSC Selection, Frequency Switching, Output Enable, or Power Down
  • Generates Highly Accurate Clocks for Video, Audio, USB, IEEE1394, RFID, Bluetooth™, WLAN, Ethernet™, and GPS
  • Generates Common Clock Frequencies Used With TI-DaVinci™, OMAP™, DSPs
  • Programmable SSC Modulation
  • Enables 0-PPM Clock Generation
• 1.8-V Device Power Supply
• Wide Temperature Range –40°C to 85°C
• Packaged in TSSOP
• Development and Programming Kit for Easy PLL Design and Programming (TI Pro-Clock)
• APPLICATIONS
  • D-TV, STB, IP-STB, DVD-Player, DVD-Recorder, Printer

DaVinci, OMAP, Pro-Clock are trademarks of Texas Instruments.
Bluetooth is a trademark of Bluetooth SIG.
I2C is a trademark of Philips Electronics.
Ethernet is a trademark of Xerox Corporattion.

说明

The CDCE913 and CDCEL913 are modular PLL-based low-cost, high-performance, programmable clock synthesizers, multipliers, and dividers. They generate up to 3 output clocks from a single input frequency. Each output can be programmed in-system for any clock frequency up to 230 MHz, using the integrated configurable PLL.

The CDCx913 has separate output supply pins, V_DDOUT, which is 1.8 V for CDCEL913 and 2.5 V to 3.3 V for CDCE913.

The input accepts an external crystal or LVCMOS clock signal. If an external crystal is used, an on-chip load capacitor is adequate for most applications. The value of the load capacitor is programmable from 0 to 20 pF. Additionally, an on-chip VCXO is selectable which allows synchronization of the output frequency to an external control signal, that is, PWM signal.

The deep M/N divider ratio allows the generation of zero-ppm audio/video, networking (WLAN, BlueTooth, Ethernet, GPS) or interface (USB, IEEE1394, Memory Stick) clocks from e.g., a 27 MHz reference input frequency.

The PLL supports SSC (spread-spectrum clocking). SSC can be center-spread or down-spread clocking which is a common technique to reduce electro-magnetic interference (EMI).

Based on the PLL frequency and the divider settings, the internal loop filter components are automatically adjusted to achieve high stability and optimized jitter transfer characteristic.

The device supports non-volatile EEPROM programming for ease customization of the device to the application. It is preset to a factory default configuration (see the section). It can be re-programmed to a different application configuration before PCB assembly, or re-programmed by in-system programming. All device settings are programmable through SDA/SCL bus, a 2-wire serial interface.

Three programmable control inputs, S0, S1 and S2, can be used to select different frequencies, or change SSC setting for lowering EMI, or other control features like, outputs disable to low, outputs 3-state, power down, PLL bypass etc).

The CDCx913 operates in a 1.8 V environment. It operates in a temperature range of –40°C to 85°C.