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TMS320DM335 状态: ACTIVE

数字媒体片上系统 (DMSoC)

      
         
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数据表

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 TMS320DM335-135TMS320DM335-216
CPU1 ARM9, DaVinci Video  1 ARM9, DaVinci Video  
RISC Frequency(MHz)135  216  
RAM32  32  
ROM8 KB  8 KB  
EMIF1 8/16-bit EMIFA,1 16-bit mDDR/DDR2  1 8/16-bit EMIFA,1 16-bit mDDR/DDR2  
External Memory Type SupportedAsync SRAM,mDDR,DDR2 SDRAM,OneNAND,NAND Flash,SmartMedia/xD  Async SRAM,mDDR,DDR2 SDRAM,OneNAND,NAND Flash,SmartMedia/xD  
DMA64-Ch EDMA  64-Ch EDMA  
Video Port (Configurable)1 Dedicated Output,1 Dedicated Input  1 Dedicated Output,1 Dedicated Input  
Hardware AcceleratorsResizer,OSD,Previewer,H3A  Resizer,OSD,Previewer,H3A  
MMC/SD2  2  
DAC1  1  
ASP2  2  
I2C1  1  
SPI3  3  
UART3  3  
USB1 USB 2.0 HS  1 USB 2.0 HS  
PWM4  4  
Timers3 64-Bit GP,1 64-Bit WD  3 64-Bit GP,1 64-Bit WD  
Core Supply (Volts)1.3 V  1.3 V  
Boot Loader AvailableYes  Yes  
IO Supply (Volts)1.8 V,3.3 V  1.8 V,3.3 V  
Operating Temperature Range (°C)0 to 85  0 to 85  
OTHER4 RTO  4 RTO  
 样片样片
 无库存无库存

产品信息

特性

  • High-Performance Digital Media System-on-Chip
    • 135-, 216--MHz ARM926EJ-S™ Clock Rate
    • Fully Software-Compatible With ARM9
    • Extended Temperature 135- and 216-MHz Devices are Available
  • ARM926EJ-S Core
    • Support for 32-Bit and 16-Bit (Thumb Mode) Instruction Sets
    • DSP Instruction Extensions and Single Cycle MAC
    • ARM® Jazelle® Technology
    • EmbeddedICE-RT™ Logic for Real-Time Debug
  • ARM9 Memory Architecture
    • 16K-Byte Instruction Cache
    • 8K-Byte Data Cache
    • 32K-Byte RAM
    • 8K-Byte ROM
    • Little Endian
  • Video Processing Subsystem
    • Front End Provides:
      • Hardware IPIPE for Real-Time Image Processing
      • Up to 14-bit CCD/CMOS Digital Interface
      • 16-/8-bit Generic YcBcR-4:2 Interface (BT.601)
      • 10-/8-bit CCIR6565/BT655 Interface
      • Up to 75-MHz Pixel Clock
      • Histogram Module
      • Resize Engine
        • Resize Images From 1/16x to 8x
        • Separate Horizontal/Vertical Control
        • Two Simultaneous Output Paths
    • Back End Provides:
      • Hardware On-Screen Display (OSD)
      • Composite NTSC/PAL video encoder output
      • 8-/16-bit YCC and Up to 18-Bit RGB666 Digital Output
      • BT.601/BT.656 Digital YCbCr 4:2:2 (8-/16-Bit) Interface
      • Supports digital HDTV (720p/1080i)output for connection to external encoder
  • External Memory Interfaces (EMIFs)
    • DDR2 and mDDR SDRAM 16-bit wide EMIF With 256 MByte Address Space (1.8-V I/O)
    • Asynchronous16-/8-bit Wide EMIF (AEMIF)
      • Flash Memory Interfaces
        • NAND (8-/16-bit Wide Data)
        • OneNAND(16-bit Wide Data)
  • Flash Card Interfaces
    • Two Multimedia Card (MMC) / Secure Digital (SD/SDIO)
    • SmartMedia
  • Enhanced Direct-Memory-Access (EDMA) Controller (64 Independent Channels)
  • USB Port with Integrated 2.0 High-Speed PHY that Supports
    • USB 2.0 Full and High-Speed Device
    • USB 2.0 Low, Full, and High-Speed Host
  • Three 64-Bit General-Purpose Timers (each configurable as two 32-bit timers)
  • One 64-Bit Watch Dog Timer
  • Three UARTs (One fast UART with RTS and CTS Flow Control)
  • Three Serial Port Interfaces (SPI) each with two Chip-Selects
  • One Master/Slave Inter-Integrated Circuit (I2C) Bus®
  • Two Audio Serial Port (ASP)
    • I2S and TDM I2S
    • AC97 Audio Codec Interface
    • S/PDIF via Software
    • Standard Voice Codec Interface (AIC12)
    • SPI Protocol (Master Mode Only)
  • Four Pulse Width Modulator (PWM) Outputs
  • Four RTO (Real Time Out) Outputs
  • Up to 104 General-Purpose I/O (GPIO) Pins (Multiplexed with Other Device Functions)
  • On-Chip ARM ROM Bootloader (RBL) to Boot From NAND Flash, MMC/SD, or UART
  • Configurable Power-Saving Modes
  • Crystal or External Clock Input (typically 24 MHz or 36 MHz)
  • Flexible PLL Clock Generators
  • Debug Interface Support
    • IEEE-1149.1 (JTAG) Boundary-Scan-Compatible
    • ETB™ (Embedded Trace Buffer™) with4K-Bytes Trace Buffer memory
    • Device Revision ID Readable by ARM
  • 337-Pin Ball Grid Array (BGA) Package (ZCE Suffix), 0.65-mm Ball Pitch
  • 90nm Process Technology
  • 3.3-V and 1.8-V I/O, 1.3-V Internal

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All other trademarks are the property of their respective owners.

说明

The DM335 processor is a low-cost, low-power processor providing advanced graphical user interface for display applications that do not require video compression and decompression. Coupled with a video processing subsystem (VPSS) that provides 720p display, the DM335 processor is powered by a 135/216/270 MHz ARM926EJ-S core so developers can create feature rich graphical user interfaces allowing customers to interact with their portable, electronic devices such as video-enabled universal remote controls, Internet radio, e-books, video doorbells and digital telescopes. The new DM335 is packed with the same peripherals as its predecessor, the TMS320DM355 device, including high speed USB 2.0 on-the-go, external memory interface (EMIF), mobile DDR/DDR2, two SDIO ports, three UART Ports, two Audio Serial Ports, three SPI Ports, and SLC/MCL NAND Flash memory support.

These peripherals help customers create DM335 processor-based designs that add video and audio excitement to a wide range of today's static user-interface applications while keeping silicon costs and power consumption low. The new digital media processor is completely scalable with the DM355 processor and Digital Video Evaluation Board (DVEVM), allowing customers to utilize their same code for their new DM335 processor focused designs.

The new DM335 device delivers a sophisticated suite of capabilities allowing for flexible image capture and display. Through its user interface technology, such as a four-level on-screen display, developers are able to create picture-within-picture and video-within-video as well as innovative graphic user interfaces. This is especially important for portable products that require the use of button or touch screen, such as portable karaoke, video surveillance and electronic gaming applications. Additional advanced capture and imaging technologies include support for CCD/CMOS image sensors, resize capability and video stabilization. The 1280-by-960-pixel digital LCD connection runs on a 75-MHz pixel clock and supports TV composite output for increased expandability. This highly integrated device is packaged in a 13 x 13 mm, 337 pin , 0.65 mm pitch BGA package.

The DM335 processor core is an ARM926EJ-S RISC processor. The ARM926EJ-S is a 32-bit processor core that performs 32-bit and 16-bit instructions and processes 32-bit, 16-bit, and 8-bit data. The core uses pipelining so that all parts of the processor and memory system can operate continuously. The ARM core incorporates:

  • A coprocessor 15 (CP15) and protection module
  • Data and program Memory Management Units (MMUs) with table look-aside buffers.
  • Separate 16K-byte instruction and 8K-byte data caches. Both are four-way associative with virtual index virtual tag (VIVT).

The DM335 device has a Video Processing Subsystem (VPSS) with two configurable video/imaging peripherals:

  • A Video Processing Front-End (VPFE)
  • A Video Processing Back-End (VPBE)

The VPFE port provides an interface for CCD/CMOS imager modules and video decoders. The VPBE provides hardware On Screen Display (OSD) support and composite NTSC/PAL and digital LCD output.

The DM335 peripheral set includes:

  • An inter-integrated circuit (I2C) Bus interface
  • Two audio serial ports (ASP)
  • Three 64-bit general-purpose timers each configurable as two independent 32-bit timers
  • A 64-bit watchdog timer
  • Up to 104-pins of general-purpose input/output (GPIO) with programmable interrupt/event generation modes, multiplexed with other peripherals
  • Three UARTs with hardware handshaking support on one UART
  • Three serial port Interfaces (SPI)
  • Four pulse width modulator (PWM) peripherals
  • Four real time out (RTO) outputs
  • Two Multi-Media Card / Secure Digital (MMC/SD/SDIO) interfaces
  • Wireless interfaces (Bluetooth, WLAN, WUSB) through SDIO
  • A USB 2.0 full and high-speed device and host interface
  • Two external memory interfaces:
    • An asynchronous external memory interface (AEMIF) for slower memories/peripherals such as NAND and OneNAND,
    • A high speed synchronous memory interface for DDR2/mDDR.

For software development support the DM335 has a complete set of ARM development tools which include: C compilers, assembly optimizers to simplify programming and scheduling, and a Windows™debugger interface for visibility into source code execution.

    

定价/封装/CAD 设计工具/样片

价格（美元）封装样片
器件状态温度 (oC)价格（美元） | Quantity封装 | 引脚封装数量 | 封装载体样片
TMS320DM335ZCE135ACTIVE0 to 8510.00 | 100uNFBGA (ZCE) | 337 160请与TI分销商或销售办事处联系申请样片
TMS320DM335ZCE216ACTIVE0 to 8511.30 | 100uNFBGA (ZCE) | 337 1请与TI分销商或销售办事处联系申请样片

建议零售价格仅用于预算，以美元为单位，并且价格是浮动的。 若要查询有关批量价格、本地货币价格或交付报价的信息，请与当地德州仪器 (TI) 销售办事处或授权经销商联系。

质量与无铅数据

 产品目录DPPM / MTBF / FIT 率
器件环保计划* 铅/焊球涂层MSL 等级/回流焊峰详细信息详细信息
TMS320DM335ZCE135 符合 RoHS Pb-Free (RoHS) Call TI Level-3-260C-168 HR查看查看
TMS320DM335ZCE216 符合 RoHS Pb-Free (RoHS) Call TI Level-3-260C-168 HR查看查看

* 计划的环保分级：无铅 (RoHS)、无铅（RoHS 豁免）或绿色环保（RoHS 和无 Sb/Br）- 请单击上表中产品目录明细的“查看”链接，以获得最新供货信息和附加产品目录明细。

如果此时没有在线提供您所请求的信息，则请联系 我们的产品信息中心， 以了解关于此信息可用性的信息。

技术文档

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模型

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参考设计

说明 型号 公司
DM335 Compact Low Cost Module Z3 Technology

工具与软件

名称型号 公司 工具/软件类型
Code Composer Studio IDECCSTUDIOTexas InstrumentsCode Composer Studio(TM) IDE
XDS510 类仿真器XDS510Texas Instruments仿真器/分析仪
TMS320DM355 数字视频评估模块TMDSEVM355Texas Instruments开发电路板/EVM
MPEG-4 视频编码器TMDMPEG4E Texas Instruments 算法/ 解码器 
MPEG-4 视频解码器TMDMPEG4D Texas Instruments 算法/ 解码器 
JPEG 成像解码器TMDJPEGD Texas Instruments 算法/ 解码器 
AAC HE 和 LC 音频编码器TMDAACE Texas Instruments 算法/ 解码器 
WMA 音频编解码器TMDWMA Texas Instruments 算法/ 解码器 
MP3 音频编码器TMDMP3E Texas Instruments 算法/ 解码器 
用于达芬奇器件的 Linux 数字视频软件开发套件 (DVSDK)LINUXDVSDK-DV Texas Instruments DSP/BIOS 实时内核 
JPEG 成像编码器TMDJPEGE Texas Instruments 算法/ 解码器 
AAC HE 和 LC 音频解码器TMDAACD Texas Instruments 算法/ 解码器 
驱动程序/平台支持包 (PSP)SUPPORTPKG Texas Instruments 驱动程序/ IO/ 控制 软件 
MP3 音频解码器TMDMP3D Texas Instruments 算法/ 解码器 
多媒体框架产品 (MFP) - 编解码引擎和 xDAIS 框架组件TMDMFP Texas Instruments 框架软件 

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