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TMS320VC5503 状态: ACTIVE

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 TMS320VC5503-200
CPU1 C55x  
Peak MMACS400  
Frequency(MHz)200,144,108  
RAM64 KB  
ROM64 KB  
EMIF1 16-Bit  
External Memory Type SupportedAsync SRAM,SDRAM  
DMA1 6-Ch Int/Ext DMA  
HPI1 16-Bit EHPI  
McBSP3  
I2C1  
Timers2 16-Bit GP,1 WD,1 RTC  
Boot Loader AvailableYES  
Core Supply (Volts)1.6 V,1.35 V,1.2 V  
IO Supply (Volts)2.7 V to 3.6 V  
Operating Temperature Range (°C)-40 to 85  
RatingCatalog  
 样片
 库存

产品信息

特性

  • High-Performance, Low-Power, Fixed-Point TMS320C55™ Digital Signal Processor
    • 9.26-, 6.95-, 5-ns Instruction Cycle Time
    • 108-, 144-, 200-MHz Clock Rate
    • One/Two Instruction(s) Executed per Cycle
    • Dual Multipliers [Up to 400 Million Multiply-Accumulates per Second (MMACS)]
    • Two Arithmetic/Logic Units (ALUs)
    • Three Internal Data/Operand Read Buses and Two Internal Data/Operand Write Buses
  • 32K × 16-Bit On-Chip RAM, Composed of:
    • 64K Bytes of Dual-Access RAM (DARAM) 8 Blocks of 4K × 16-Bit
  • 64K Bytes of One-Wait-State On-Chip ROM (32K × 16-Bit)
  • 8M × 16-Bit Maximum Addressable External Memory Space (Synchronous DRAM)
  • 16-Bit External Parallel Bus Memory Supporting Either:
    • External Memory Interface (EMIF) With GPIO Capabilities and Glueless Interface to:
      • Asynchronous Static RAM (SRAM)
      • Asynchronous EPROM
      • Synchronous DRAM (SDRAM)
    • 16-Bit Parallel Enhanced Host-Port Interface (EHPI) With GPIO Capabilities
  • Programmable Low-Power Control of Six Device Functional Domains
  • On-Chip Scan-Based Emulation Logic
  • On-Chip Peripherals
    • Two 20-Bit Timers
    • Watchdog Timer
    • Six-Channel Direct Memory Access (DMA) Controller
    • Three Multichannel Buffered Serial Ports (McBSPs)
    • Programmable Phase-Locked Loop Clock Generator
    • Seven (LQFP) or Eight (BGA) General-Purpose I/O (GPIO) Pins and a General- Purpose Output Pin (XF)
    • Inter-Integrated Circuit (I2C) Multi-Master and Slave Interface
    • Real-Time Clock (RTC) With Crystal Input, Separate Clock Domain, Separate Power Supply
  • IEEE Std 1149.1(1) (JTAG) Boundary Scan Logic
  • Packages:
    • 144-Terminal Low-Profile Quad Flatpack (LQFP) (PGE Suffix)
    • 179-Terminal MicroStar BGA™ (Ball Grid Array) (GHH and ZHH Suffixes)
    • 1.2-V Core (108 MHz), 2.7-V - 3.6-V I/Os
  • 1.35-V Core (144 MHz), 2.7-V - 3.6-V I/Os
  • 1.6-V Core (200 MHz), 2.7-V - 3.6-V I/Os

C55x, eXpressDSP, Code Composer Studio, DSP/BIOS, RTDX, and XDS510 are trademarks of Texas Instruments.
TMS320C55x and MicroStar BGA are trademarks of Texas Instruments.
All trademarks are the property of their respective owners.
(1)IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.

说明

The TMS320VC5503 fixed-point digital signal processor (DSP) is based on the TMS320C55x DSP generation CPU processor core. The C55x™ DSP architecture achieves high performance and low power through increased parallelism and total focus on reduction in power dissipation. The CPU supports an internal bus structure that is composed of one program bus, three data read buses, two data write buses, and additional buses dedicated to peripheral and DMA activity. These buses provide the ability to perform up to three data reads and two data writes in a single cycle. In parallel, the DMA controller can perform up to two data transfers per cycle independent of the CPU activity.

The C55x CPU provides two multiply-accumulate (MAC) units, each capable of 17-bit × 17-bit multiplication in a single cycle. A central 40-bit arithmetic/logic unit (ALU) is supported by an additional 16-bit ALU. Use of the ALUs is under instruction set control, providing the ability to optimize parallel activity and power consumption. These resources are managed in the Address Unit (AU) and Data Unit (DU) of the C55x CPU.

The C55x DSP generation supports a variable byte width instruction set for improved code density. The Instruction Unit (IU) performs 32-bit program fetches from internal or external memory and queues instructions for the Program Unit (PU). The Program Unit decodes the instructions, directs tasks to AU and DU resources, and manages the fully protected pipeline. Predictive branching capability avoids pipeline flushes on execution of conditional instructions.

The 64K bytes of on-chip memory on TMS320VC5503 is sufficient for many hand-held appliances, portable GPS systems, wireless speaker phones, portable PDAs, and gaming devices. Many of these appliances typically require 64K bytes or smaller amount of on-chip memory and need to operate in standby mode for more than 60% to 70% of the time. For applications that require more than 64K bytes of on-chip memory but less than 128K bytes of memory, Texas Instruments (TI) offers the TMS320VC5507 device, which is based on the TMS320C55x DSP core.

The general-purpose input and output functions and the 10-bit A/D provide sufficient pins for status, interrupts, and bit I/O for LCDs, keyboards, and media interfaces. The parallel interface operates in two modes, either as a slave to a microcontroller using the HPI port or as a parallel media interface using the asynchronous EMIF. Serial media is supported through three McBSPs.

The 5503 peripheral set includes an external memory interface (EMIF) that provides glueless access to asynchronous memories like EPROM and SRAM, as well as to high-speed, high-density memories such as synchronous DRAM. Additional peripherals include real-time clock, watchdog timer, and I2C multi-master and slave interface. Three full-duplex multichannel buffered serial ports (McBSPs) provide glueless interface to a variety of industry-standard serial devices, and multichannel communication with up to 128 separately enabled channels. The enhanced host-port interface (HPI) is a 16-bit parallel interface used to provide host processor access to 32K bytes of internal memory on the 5503. The HPI can be configured in either multiplexed or non-multiplexed mode to provide glueless interface to a wide variety of host processors. The DMA controller provides data movement for six independent channel contexts without CPU intervention, providing DMA throughput of up to two 16-bit words per cycle. Two general-purpose timers, up to eight dedicated general-purpose I/O (GPIO) pins, and digital phase-locked loop (DPLL) clock generation are also included.

The 5503 is supported by the industry's award-winning eXpressDSP™, Code Composer Studio™ Integrated Development Environment (IDE), DSP/BIOS™, Texas Instruments' algorithm standard, and the industry's largest third-party network. The Code Composer Studio IDE features code generation tools including a C Compiler and Visual Linker, simulator, RTDX™, XDS510™ emulation device drivers, and evaluation modules. The 5503 is also supported by the C55x DSP Library which features more than 50 foundational software kernels (FIR filters, IIR filters,

    

定价/封装/CAD 设计工具/样片

价格（美元）封装CAD 设计工具样片
器件状态价格（美元） | Quantity封装 | 引脚封装数量 | 封装载体符号尺寸样片
TMS320VC5503GHHACTIVE7.50 | 100uBGA MICROSTAR (GHH) | 179 160 下载此符号的 CAD 格式 采购样片
TMS320VC5503PGEACTIVE7.50 | 100uLQFP (PGE) | 144 60 下载此符号的 CAD 格式 下载此尺寸的 CAD 格式
TMS320VC5503ZHHACTIVE7.50 | 100uBGA MICROSTAR (ZHH) | 179 160 下载此符号的 CAD 格式 下载此尺寸的 CAD 格式采购样片

建议零售价格仅用于预算，以美元为单位，并且价格是浮动的。 若要查询有关批量价格、本地货币价格或交付报价的信息，请与当地德州仪器 (TI) 销售办事处或授权经销商联系。

库存

  TI 库存状态 已报告的分销商库存
TMS320VC5503GHH截至 4:57 PM GMT, 2009年 7月 3日截至 4:57 PM GMT, 2009年 7月 3日
 交货周期地区公司库存采购
 8 Weeks 中国WPI 110
TMS320VC5503PGE截至 4:57 PM GMT, 2009年 7月 3日截至 4:57 PM GMT, 2009年 7月 3日
 交货周期地区公司库存采购
 8 Weeks 中国WPI 66
TMS320VC5503ZHH截至 4:57 PM GMT, 2009年 7月 3日截至 4:57 PM GMT, 2009年 7月 3日
 交货周期地区公司库存采购
 8 Weeks无报告
查看经销商		   

查看中国经销商

**目前尚无法提供交货时间信息。 但是，由于我们的信息每天都会更新，如有疑问，请马上与我们联系。 有关附加信息，请与首选的 TI 授权分销商 联系。

质量与无铅数据

 产品目录DPPM / MTBF / FIT 率
器件环保计划* 铅/焊球涂层MSL 等级/回流焊峰详细信息详细信息
TMS320VC5503GHH  TBD SNPB Level-3-220C-168 HR查看查看
TMS320VC5503PGE 符合 RoHS Green (RoHS & no Sb/Br) CU NIPDAU Level-4-260C-72 HR查看查看
TMS320VC5503ZHH 符合 RoHS Green (RoHS & no Sb/Br) SNAGCU Level-3-260C-168 HR查看查看

* 计划的环保分级：无铅 (RoHS)、无铅（RoHS 豁免）或绿色环保（RoHS 和无 Sb/Br）- 请单击上表中产品目录明细的“查看”链接，以获得最新供货信息和附加产品目录明细。

如果此时没有在线提供您所请求的信息，则请联系 我们的产品信息中心， 以了解关于此信息可用性的信息。

技术文档

TMS320VC5503 最新技术文档 Help

数据表

应用手册

查看 TMS320C55x 低功耗 DSP 的应用手册

用户指南

查看 TMS320C55x 低功耗 DSP 的用户指南

模型

查看 TMS320C55x 低功耗 DSP 的模拟模型

勘误表

工具与软件

名称型号 公司 工具/软件类型
Code Composer Studio IDECCSTUDIOTexas InstrumentsCode Composer Studio(TM) IDE
Code Composer Studio IDE 订购服务CCSTUDIOSUBSCRIPTIONSTexas InstrumentsCode Composer Studio(TM) IDE
XDS510 类仿真器XDS510Texas Instruments仿真器/分析仪
XDS560 类高速仿真器XDS560Texas Instruments仿真器/分析仪
Blackhawk™ LAN560 JTAG EmulatorBlackhawk仿真器/分析仪
Blackhawk™ PCI560 JTAG Emulator for TI DSPsBlackhawk仿真器/分析仪
Blackhawk™ USB560BP JTAG EmulatorBlackhawk仿真器/分析仪
JTAGjet USB 2.0 Emulator for TMS320Signum Systems仿真器/分析仪
XDS510PP PLUS JTAG EmulatorSpectrum Digital, Inc.仿真器/分析仪
XDS510USB JTAG EmulatorSpectrum Digital, Inc.仿真器/分析仪
XDS510USB PLUS JTAG EmulatorSpectrum Digital, Inc.仿真器/分析仪
TMS320VC5509A DSP 入门套件 (DSK)TMDSDSK5509Texas Instruments入门套件
TMS320VC5510 DSP 入门套件 (DSK)TMDSDSK5510Texas Instruments入门套件
TMS320VC5505 DSP 评估模块TMDXEVM5505Texas Instruments开发电路板/EVM
Q-VGA LCD Module for OMAP5912Mistral Solutions Pvt. Ltd开发电路板/EVM
OMAP OSK 闪存恢复实用程序TMDSSDSFRUTexas Instruments闪存工具
TMS320C55x DSP 库SPRC100 Texas Instruments 信号处理库 
TMS320C55x 芯片支持库SPRC133 Texas Instruments 应用软件 
TMS320C55x 图像库SPRC101 Texas Instruments 信号处理库 

型号 名称 产品系列 注释
ADS820   10 位 20MSPS ADC，单端/差动输入具有内部基准和 9.5 位 ENOB   DATA CONVERTERS - ANALOG TO DIGITAL CONVERTERS      
ADS900   10 位 20MSPS ADC，具有单端/差动输入、内部基准和可调节全范围   DATA CONVERTERS - ANALOG TO DIGITAL CONVERTERS      
ADS901   10 位 20MSPS ADC，具有单端/差动输入、外部参考和可调节全范围   DATA CONVERTERS - ANALOG TO DIGITAL CONVERTERS      
THS10082   具有双通道、并行 DSP/uP 接口、16X FIFO、通道自动扫描、低功耗的 10 位 8MSPS ADC   DATA CONVERTERS - ANALOG TO DIGITAL CONVERTERS      

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