74ACT16651
- Members of the Texas Instruments WidebusTM Family
- Inputs Are TTL-Voltage Compatible
- Inverting Data Paths
- Independent Registers and Enables for A and B Buses
- Multiplexed Real-Time and Stored Data
- Flow-Through Architecture Optimizes PCB Layout
- Distributed VCC and GND Pin Configurations Minimize High-Speed Switching Noise
- EPICTM (Enhanced-Performance Implanted CMOS) 1-m Process
- 500-mA Typical Latch-Up Immunity at 125°C
- Packaged in Plastic 300-mil Shrink Small-Outline (DL) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
The SN54ACT16651 and 74ACT16651 are 16-bit bus transceivers that consist of D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. These devices can be used as two 8-bit transceivers or one 16-bit transceiver.
Complementary output-enable (OEAB and ) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. A low input level selects real-time data, and a high input level selects stored data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the SN54ACT16651 and 74ACT16651.
Data on the A or B bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA) inputs regardless of the levels on the select-control or output-enable inputs. When SAB and SBA are in the real-time transfer mode, it is also possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and . In this configuration, each output reinforces its input. Thus, when all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state.
The 74ACT16651 is packaged in TI's shrink small-outline package, which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.
The SN54ACT16651 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74ACT16651 is characterized for operation from -40°C to 85°C.
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技术文档
类型 | 标题 | 下载最新的英语版本 | 日期 | |||
---|---|---|---|---|---|---|
* | 数据表 | 16-Bit Transceivers And Registers With 3-State Outputs 数据表 (Rev. A) | 1996年 4月 1日 | |||
应用手册 | Implications of Slow or Floating CMOS Inputs (Rev. E) | 2021年 7月 26日 | ||||
选择指南 | Logic Guide (Rev. AB) | 2017年 6月 12日 | ||||
应用手册 | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 2015年 12月 2日 | ||||
选择指南 | 逻辑器件指南 2014 (Rev. AA) | 最新英语版本 (Rev.AB) | 2014年 11月 17日 | |||
用户指南 | LOGIC Pocket Data Book (Rev. B) | 2007年 1月 16日 | ||||
应用手册 | 选择正确的电平转换解决方案 (Rev. A) | 英语版 (Rev.A) | 2006年 3月 23日 | |||
应用手册 | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004年 7月 8日 | ||||
应用手册 | TI IBIS File Creation, Validation, and Distribution Processes | 2002年 8月 29日 | ||||
应用手册 | CMOS Power Consumption and CPD Calculation (Rev. B) | 1997年 6月 1日 | ||||
应用手册 | 使用逻辑器件进行设计 (Rev. C) | 1997年 6月 1日 | ||||
应用手册 | Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc | 1996年 4月 1日 |
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